User Contributed                                           MET/CAL PROCEDURE
=============================================================================
INSTRUMENT:            Tektronix TMÿ503:Power Module
DATE:                  15-Jan-97
AUTHOR:                User Contributed
REVISION:              0
ADJUSTMENT THRESHOLD:  70%
NUMBER OF TESTS:       7
NUMBER OF LINES:       86
CONFIGURATION:         Datron 1281
=============================================================================
 STEP    FSC    RANGE NOMINAL        TOLERANCE     MOD1        MOD2  3  4 CON
  1.001  IEEE         [@1281] *RST
  1.002  ASK-                        P                            F
  1.003  ASK+                                          X
  1.004  HEAD         ÍÍ INITIAL CONDITIONS ÍÍ
  1.005  DISP         Refer to TM 503 PARTS LOCATION GRID for location of
  1.005  DISP         test points and componants.
  1.006  DISP         With UUT disconnected from AC power, remove the top
  1.006  DISP         and bottom covers.
  1.007  DISP         Lay the UUT on it's side for access to the test points
  1.007  DISP         on the bottom of the back plane.
  1.008  HEAD         {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»}
  1.009  HEAD         {º Power Supply Test º}
  1.010  HEAD         {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ}
  1.011  HEAD         {}ÍÍ Power Supply Test ÍÍ
  1.012  JMP          2.001
  1.013  EVAL
  2.001  DISP         Connect the 1281 HI and LO inputs accross the UUT C44.
  2.002  DISP         Connect the UUT to the appropriate AC source and set
  2.002  DISP         the PWR switch to the on position.
  2.003  IEEE         [@1281]ACV AUTO,ACCP
  2.004  IEEE         [@1281] RDG?[D2000][I]RDG?[D1000][I]
  2.005  MATH         MEM1 = 25
  2.006  MEME
  2.007  TOL          +10.00/ -15.00/
  2.008  MEMC   25    VAC            TOL           60H
  3.001  DISP         Disconnect UUT from AC power.
  3.002  DISP         Connect the 1281 HI to the UUT C35 (+) terminal.
  3.003  DISP         Connect the 1281 LO to the UUT C35 (-) terminal.
  3.004  DISP         Connect the UUT to the appropriate AC source and set
  3.004  DISP         the PWR switch to the on position.
  3.005  IEEE         [@1281]DCV AUTO
  3.006  IEEE         [@1281] RDG?[D2000][I]RDG?[D1000][I]
  3.007  MATH         MEM1 = 11.5
  3.008  MEME
  3.009  MEMC         V              -3.9U +4.5U
  4.001  DISP         Disconnect UUT from AC power.
  4.002  DISP         Set UUT upright and remove partical sheild from UUT
  4.002  DISP         backplane.
  4.003  DISP         Connect the 1281 HI to the left side of R22 (bottom 2kê)
  4.003  DISP         and connect the 1281 LO to the right side of R22.
  4.004  DISP         Connect the UUT to the appropriate AC source and set
  4.004  DISP         the PWR switch to the on position.
  4.005  IEEE         [@1281]DCV AUTO
  4.006  IEEE         [@1281] RDG?[D2000][I]RDG?[D1000][I]
  4.007  MATH         MEM1 = -33.5
  4.008  MEME
  4.009  MEMC         V              +9.8U -6.5U
  5.001  DISP         Disconnect UUT from AC power.
  5.002  DISP         Connect the 1281 HI to the left side of R22 (top 2kê)
  5.002  DISP         and connect the 1281 LO to the right side of R22.
  5.003  DISP         Connect the UUT to the appropriate AC source and set
  5.003  DISP         the PWR switch to the on position.
  5.004  IEEE         [@1281]DCV AUTO
  5.005  IEEE         [@1281] RDG?[D2000][I]RDG?[D1000][I]
  5.006  MATH         MEM1 = 33.5
  5.007  MEME
  5.008  MEMC         V              -9.8U +6.5U

  6.001  DISP         Disconnect UUT from AC power.
  6.002  DISP         Connect the 1281 HI and LO inputs accross the UUT C14.
  6.003  DISP         Connect the UUT to the appropriate AC source and set
  6.003  DISP         the PWR switch to the on position.
  6.004  IEEE         [@1281]ACV AUTO,ACCP
  6.005  IEEE         [@1281] RDG?[D2000][I]RDG?[D1000][I]
  6.006  MATH         MEM1 = 25
  6.007  MEME
  6.008  TOL          +10.00/ -15.00/
  6.009  MEMC   25    VAC            TOL           60H
  7.001  DISP         Disconnect UUT from AC power.
  7.002  DISP         Disconnect the test setup.
  7.003  HEAD
  7.004  DISP         {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»}
  7.004  DISP         {º This Completes the Maintenance Check º}
  7.004  DISP         {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ}